Low-Frequency Clock Generation

Low

The Z80 must be supplied with an external clock source on pin 6 for most if not all Z80 DIP packages. A clock source is one of the most useful de-bugging tools that you can use in developing a Z80 system. The clock allows you to monitor the function of your system at a speed you choose. We would like a low-frequency square wave clock pulse train to drive our system, and the lower the frequency the better.

The range of around 1Hz – 20Hz is a great frequency range to shoot for when designing a low-frequency clock circuit. This is because of flicker threshold. Somewhere around 20Hz or twenty cycles per second humans have a hard time perceiving a change between light states. For instance if you were to connect an LED to a 20 Hertz square wave you would find that the LED does not appear to be blinking, but rather just illuminated and stable. It would not be beneficial to run the system much higher than 20 hertz while debugging because we would not see each transition the Z80 is making.

The maximum amount of clock cycles the Z80 takes to execute an instruction is around 20 clock cycles. On the low side of the instruction cycle count is the ‘NOP’ and ‘HALT’ instruction which each take 4 clock cycles, so at 20 Hertz it would only take 1/5 of a second to execute, whereas at 2 Hertz it would take 2 seconds to complete a ‘NOP’ or ‘HALT’. So in general slower is better to see transition.

You also want to strive for a 50% duty cycle clock source which is what the Z80 microprocessor requires. This means that the square wave is high the exact same amount of time as it is low. There is some leeway on this requirement, but I would say that as a rule of thumb try to keep it within ~(+/-)10% of 50% duty cycle.

The schematic that I have followed to realize this clock source can be seen below. This schematic produced a frequency range of around 5Hz to 20Hz. I used a calculator to find these values from this website, OhmsLawCalculator. A similar circuit can be seen in the 555’s data sheet under “Astable operation.”

LFSWGS

A low-frequency clock source is very useful in debugging, but counting cycles and remembering where you are in conjunction to the Z80’s operation can be hard. A better option would be an instruction-stepping clock. This source would take advantage of the Z80’s WAIT (pin 24) and M1 (pin 27) signal pins to run each instruction individually through a de-bounced button press. Each time the user presses the button an instruction would execute fully and wait for the user to press the button again to execute another instruction. With a monitor device on the bus such as a bank of LEDs, the user could verify the computer is functioning exactly as desired. I will be developing an instruction-stepping clock in a later post, and will explain more about its function.

All files from this project can be downloaded from my GitHub Repository,

Z80 Project Repository

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About Matt Cook

Computer Engineer
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2 Responses to Low-Frequency Clock Generation

  1. Johnny Quest says:

    Hi Matt:
    I am working on a Z80 SBC design at the moment as well. I decided to integrate an AVR as a system controller. I am only about a week into the design but like you, I am designing, building and testing in small steps before I jump in to a full PCB.

    Thus far, I have the SPLD coded and running as an IO decoder and wait-state generator and I have the 74HC299 coded to drive and read the data bus, which I am using because I ran out of 8-bit ports on the AVR ( the address and control lines use nearly 24 bits of I/O).

    The project is currently being hosted here: https://hackaday.io/project/15942-z80-single-board-computer-with-avr-controller

    What are you planning to use as a system clock generator for your project? I was going to use a 74HC4060 with its built-in crystal oscillator as I could tap various clock frequencies from the divider outputs but I decided that I would be better off using the programmable timer output on the AVR as the clock source instead.

    • Matt Cook says:

      I use a dedicated crystal oscillator package. Put power on it and get a clock signal. No fuss. You can divide as needed from here. Going with a logic device that controls the clock seems like a good idea, until the logic device hangs and the rest of the system follows.

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